RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
Register 0x224 : RHDL Maximum Packet Length
Bit
Type
Function
Default
Bit 31 to
Bit 16
Unused
XXXXH
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MAX[15]
MAX[14]
MAX[13]
MAX[12]
MAX[11]
MAX[10]
MAX[9]
MAX[8]
MAX[7]
MAX[6]
MAX[5]
MAX[4]
MAX[3]
MAX[2]
MAX[1]
MAX[0]
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
This register configures the maximum legal HDLC packet byte length.
Note
This register is not byte addressable. Writing to this register modifies all the bits in the register.
Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all
four byte enables are negated, no access is made to this register.
MAX[15:0]:
The maximum HDLC packet length (MAX[15:0]) configures the FREEDM-8 to reject HDLC
packets longer than a maximum size when LENCHK is set high. Receive packets with total
length, including address, control, information and FCS fields, greater than MAX[15:0] bytes
are aborted. When LENCHK is set low, aborts are not generated regardless of packet length
and MAX[15:0] must be set to 'hFFFF.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
130
PMC [ PMC-SIERRA, INC ]
