RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
Register 0x220 : RHDL Configuration
Bit
Type
Function
Default
Bit 31 to
Bit 16
Unused
XXXXH
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Unused
Unused
X
X
X
X
X
X
0
Unused
Unused
Unused
Unused
R/W
R/W
LENCHK
TSTD
Bit 8
0
Bit 7
Unused
X
X
X
X
X
1
Bit 6
Unused
Bit 5
Unused
Bit 4
Unused
Bit 3
Unused
Bit 2
R/W
R/W
R/W
Reserved[2]
Reserved[1]
Reserved[0]
Bit 1
1
Bit 0
1
This register configures all provisioned receive channels.
Note
This register is not byte addressable. Writing to this register modifies all the bits in the register.
Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all
four byte enables are negated, no access is made to this register.
Reserved[2:0]:
The reserved bits (Reserved[2:0]) must be set to all ones for correct operation of the
FREEDM-8 device.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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