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PM7351-BGI 参数 Datasheet PDF下载

PM7351-BGI图片预览
型号: PM7351-BGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, CMOS, PBGA304, 31 X 31 MM, 1.51 MM HEIGHT, 1.27 MM PITCH, SBGA-304]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 174 页 / 1840 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7351 S/UNI-VORTEX  
DATA SHEET  
PMC-1980582  
ISSUE 5  
OCTAL SERIAL LINK MULTIPLEXER  
Fig. 15 Microprocessor Interface Write Timing  
A[8:0]  
Valid Address  
tS  
tH  
ALW  
ALW  
tV  
L
tS  
tH  
LW  
LW  
ALE  
tS  
tV  
tS  
tH  
AW  
AW  
WR  
(CSB+W RB)  
tH  
DW  
DW  
D[7:0]  
Valid Data  
Notes on Microprocessor Interface Write Timing:  
1 A valid write cycle is defined as a logical OR of the CSB and the WRB signals.  
2 In non-multiplexed address/data bus architectures, ALE should be held high so  
parameters tS  
, tH  
, tV , and tS  
are not applicable.  
LW  
ALW  
ALW  
L
3 Parameter tH  
is not applicable if address latching is used.  
AW  
4 When a set-up time is specified between an input and a clock, the set-up time is  
the time in nanoseconds from the 1.4 Volt point of the input to the 1.4 Volt point  
of the clock.  
5 When a hold time is specified between an input and a clock, the hold time is the  
time in nanoseconds from the 1.4 Volt point of the input to the 1.4 Volt point of  
the clock.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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