RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
REVISION HISTORY
Issue No.
Issue Date Details of Change
Issue 8
December
2005
Updated ordering information including RoHS-
compliant device details.
Issue 7
March 2005 Updated list of patents.
Added references:
9. PMC-Sierra; Using External Pull-Down
Resistors with 5V Tolerant 3.3V Inputs,
PMC-2012282.
10. PMC-Sierra; PM7350 S/UNI-DUPLEX
Device Errata, PMC-1990883.
Added sentence "All address pins are latched." to
ALE pin description.
Issue 6
April 2002
Updated Table 8 and Table 9.
Appended additional “Notes on Pin Descriptions”
for the recommended analog power filtering
networks.
Updated the specification for the IOH and IOL for
UTOPIA output interface pins.
Updated the specification for the REFCLK
frequency tolerance.
Added related patents.
Added Thermal Parameter Theta Jc. Added
related references.
Specified non-applicable hold times to notes
section on microprocessor interface read and
write timing (signals tH
tH
.
LR and LW)
Issue 5
April 2000
Updated analog parameters, I
, thermal info
DDOP
and corrected register description typos. Release
to production.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
