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PM7348 参数 Datasheet PDF下载

PM7348图片预览
型号: PM7348
PDF下载: 下载PDF文件 查看货源
内容描述: [ATM/SONET/SDH IC, CMOS, PBGA324,]
分类和应用: ATM异步传输模式
文件页数/大小: 318 页 / 1736 K
品牌: PMC [ PMC-SIERRA, INC ]
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S/UNI-IMA-4 Telecom Standard Product Data Sheet  
Released  
10 Functional Description .......................................................................................................... 44  
10.1 Any-PHY/UTOPIA Interfaces .................................................................................... 44  
10.1.1 Transmit Any-PHY/UTOPIA Slave (TXAPS)............................................... 44  
10.1.2 Receive Any-PHY/UTOPIA Slave (RXAPS) ............................................... 47  
10.1.3 Summary of Any-PHY/UTOPIA Modes....................................................... 50  
10.1.4 ANY-PHY/UTOPIA Loopback ..................................................................... 52  
10.2 IMA Sub-layer............................................................................................................ 52  
10.2.1 Overview..................................................................................................... 52  
10.2.2 IDCC scheduler........................................................................................... 53  
10.2.3 Transmit IMA Processor (TIMA).................................................................. 54  
10.2.4 Receive IMA Data Processor (RDAT)......................................................... 57  
10.2.5 Receive IMA Protocol Processor (RIPP) .................................................... 70  
10.2.6 Support of IMA Test Pattern Procedure ...................................................... 78  
10.2.7 Support of Symmetric/Asymmetric Operation Modes................................. 78  
10.2.8 Support of Different IMA Versions............................................................... 78  
10.2.9 SDRAM Interface........................................................................................ 79  
10.3 Link FIFOs................................................................................................................. 81  
10.4 TC Layer.................................................................................................................... 81  
10.4.1 TX TC Layer (TTTC)................................................................................... 81  
10.4.2 Rx TC Layer (RTTC)................................................................................... 81  
10.5 Line Side Physical Layer........................................................................................... 84  
10.5.1 TX Clock/Data (TCAS)................................................................................ 84  
10.5.2 Rx Clock/Data (RCAS)................................................................................ 84  
10.6 JTAG Test Access Port.............................................................................................. 86  
10.6.1 JTAG Support ............................................................................................. 86  
10.6.2 TAP Controller............................................................................................. 87  
10.6.3 Boundary Scan Instructions........................................................................ 89  
10.7 Microprocessor Interface........................................................................................... 91  
10.7.1 Mapping and link identification.................................................................... 91  
10.7.2 Interrupt Driven Error/Status Reporting ...................................................... 92  
10.7.3 Registers..................................................................................................... 93  
11 Normal Mode Register Description....................................................................................... 96  
11.1 Global Registers........................................................................................................ 96  
11.2 Master Interrupt Registers....................................................................................... 101  
11.3 UTOPIA Interface Registers.................................................................................... 110  
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.  
Document No.: PMC-2020889, Issue 2  
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