Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
8.7 Test Access to the Receive UTOPIA RAM (RU_RAM)
Base address: 150000h (540000h byte)
Index: 1h
Number of entries: 64 (four cells)
Type: Read/Write during SW_RESET (refer to “SW_RESET” on page 101).
Format: Refer to the following table
Field (Bits)
Description
RX_UTOPIA_RAM
(31:0)
Test access to the RU_RAM.
Receive UTOPIA Cell Buffer Summary (Internal Structure)
Base address: 1500000h (5400000h byte)
Index: 10h
Entry number: 4h
Type: Read/Write: during SW_RESET (refer to “SW_RESET” on page 101).
Long address = 1500000h + entry_number × 10h
Table 32. Receive UTOPIA Cell Buffers Summary
Cell
Offset
31:24
23:16
15:8
7:0
0
VPI(11:4)
VPI(3:0),
VCI(11:4)
VCI(3:0), PTI, CLP
VCI(15:12)
1
2
payload 0
payload 4
payload 8
payload 12
payload 16
payload 20
payload 24
payload 28
payload 32
payload 36
payload 40
payload 44
00h
payload 1
payload 5
payload 9
payload 13
payload 17
payload 21
payload 25
payload 29
payload 33
payload 37
payload 41
payload 45
000, VI
payload 2
payload 6
payload 10
payload 14
payload 18
payload 22
payload 26
payload 30
payload 34
payload 38
payload 42
payload 46
Not used
payload 3
payload 7
payload 11
payload 15
payload 19
payload 23
payload 27
payload 31
payload 35
payload 39
payload 43
payload 47
Not used
3
4
5
6
7
8
9
10
11
12
13
14
15
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
170