Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
8.4.3.1 TX_SC_MC_IN_FIFO_HEAD (Internal Structure)
Offset: 0h (0h byte)
Type: Read/Write – Do not write while SW_RESET (refer to “SW_RESET” on
page 101) is deasserted.
Format: Refer to the following table.
Field (Bits)
Description
RAM is not present in these bit locations.
Not present
(31:16)
Not used
(15:12)
Write with a 0 to maintain software compatibility with future versions.
Head of the multicast input FIFO for this SC. Initialize to 0.
TX_SC_MC_IN_FIFO_HEAD
(11:0)
8.4.3.2 TX_SC_MC_IN_FIFO_TAIL (Internal Structure)
Offset: 1h (4h byte)
Type: Read/Write – Do not write while SW_RESET (refer to “SW_RESET” on
page 101) is deasserted.
Format: Refer to the following table.
Field (Bits)
Description
RAM is not present in these bit locations.
Not present
(31:16)
Not used
(15:12)
Write with a 0 to maintain software compatibility with future versions.
Tail of the multicast IN_FIFO for this SC. Initialize to 0.
TX_SC_MC_IN_FIFO_TAIL
(11:0)
8.4.3.3 TX_SC_MC_BOTTLE (Internal Structure)
Offset: 2h (8h byte)
Type: Read/Write – Do not write while SW_RESET (refer to “SW_RESET” on
page 101) is deasserted.
Format: Refer to the following table.
Field (Bits)
Description
RAM is not present in these bit locations.
Not present
(31:16)
Not used
(15:5)
Write with a 0 to maintain software compatibility with future versions.
Bottlenecked SCQ for multicast in this SC. Initialize to 0.
TX_SC_MC_BOTTLE
(4:0)
165
PMC [ PMC-SIERRA, INC ]
