Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
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Provides per-channel (VP or VC), per-SC Queue (SCQ), per-SC, per-VO, and per-
direction congested and maximum queue depth limits.
Provides up to 64K cell buffers.
CONGESTION MANAGEMENT ALGORITHMS
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Supports EPD and Partial Packet Discard (PPD) for UBR traffic, and as a backup for ABR
traffic.
Supports CLP-based cell discard and Explicit Forward Congestion Indicator (EFCI) cell
marking.
Supports three congestion limits (as well as EPD, CLP, and EFCI, and/or backpressure)
for logical multicast on the transmit side.
SWITCHING
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Supports VC and VP switching.
Supports up to 16K VCs.
ADDRESS MAPPING
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Supports all 12 VP and 16 VC bits through use of a double, indirect lookup table.
Performs header translation at both the input (receive) and output (transmit) directions.
Input header translation is used to pass the output queue channel number through the
switch.
MULTICAST
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Supports logical multicast with a superior queue-clearing algorithm.
DIAGNOSTIC/ROBUSTNESS FEATURES
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Checks the header parity.
Counts tagged cells.
Runs error checks continually on all fabric lines.
Checks liveness of control signal lines at both switch fabric and UTOPIA interfaces,
working around partial fabric failures.
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Checks Static Random Access Memory (SRAM) and Dynamic Random Access Memory
(DRAM) parity.
STATISTICS FEATURES
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In the receive direction, counts cells transmitted and dropped.
In the transmit direction, counts cells transmitted and dropped on a per-VC basis.
I/O FEATURES
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Provides four switch element interfaces with phase aligners. The phase aligners allow for
external serialization of the data stream enabling systems to be built that support device
separation of up to 10 meters.
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Provides a UTOPIA Level 2 Multi-PHY (MPHY) 16-bit, 50 MHz interface.
Provides a 2-level priority servicing algorithm for high and low bandwidth UTOPIA PHY
layer devices.
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Provides a multiplexed address/data CPU interface.
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PMC [ PMC-SIERRA, INC ]
