Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
(Continued)
Field (Bits)
Description
TX_UT_WD_ALIVE
(0)
1
0
The PHY device at address 0 has responded to polling with an assertion of
TATM_CLAV(3:0) for a period less than WD_TIME.
The PHY device at address 0 has not responded to a poll with an assertion
of TATM_CLAV(3:0) for a period longer than WD_TIME. PHY device 0
has expired, therefore drain remaining cells intended for PHY device 0 at
lowest priority.
7.2.16 RX_CELL_START_ALIGN (Internal Structure)
RX_CELL_START_ALIGN configures the delay for the internal RxCellStart signal by taking
the external RX_CELL_START signal, adding the 7-bit offset, and generating the internal
RxCellStart signal. This allows flexibility and simplicity in the distribution of
RX_CELL_START to QRTs on different cards or on different shelves.
Address: 20h (80h byte)
Type: Read/Write
Format: Refer to the following table.
Field (Bits)
Description
Not used
(31:7)
Write with a 0 to maintain software compatibility with future versions.
RX_CELL_START_ALIGN
(6:0)
Alignment value for the internal RxCellStart signal from the external
RX_CELL_START signal.
122
PMC [ PMC-SIERRA, INC ]
