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PM7347-BI 参数 Datasheet PDF下载

PM7347-BI图片预览
型号: PM7347-BI
PDF下载: 下载PDF文件 查看货源
内容描述: SATURN用户网络接口的J2 / E3 / T3 [SATURN USER NETWORK INTERFACE for J2/E3/T3]
分类和应用: 网络接口
文件页数/大小: 341 页 / 1733 K
品牌: PMC [ PMC-SIERRA, INC ]
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S/UNI®-JET Data Sheet  
Released  
E3 LOF detection is provided as recommended by ITU-T G.783 with programmable integration  
periods of 1 ms, 2 ms, or 3 ms. While integrating up to assert LOF, the counter will integrate up  
when the framer asserts an OOF condition and integrates down when the framer de-asserts the  
OOF condition. Once an LOF is asserted, the framer must not assert OOF for the entire  
integration period before LOF is de-asserted.  
The E3-FRMR can also be enabled to automatically assert the RAI/FERF indication in the  
outgoing transmit stream upon detection of any combination of LOS, OOF or AIS. The  
E3-FRMR can also be enabled to automatically insert G.832 FEBE upon detection of receive  
BIP-8 errors.  
10.3 J2 Framer  
The J2-FRMR integrates circuitry to decode a unipolar or B8ZS encoded signal and frame to the  
resulting 6312 kbps J2 bit stream. Having found frame, the J2-FRMR extracts a variety of  
overhead and datalink information from the J2 bit stream.  
The J2 format consists of 789-bit frames, each 125 µs long, consisting of 96 bytes of payload, 2  
reserved bytes, and five F-bits. The frames are grouped into 4-frame multiframes. The multiframe  
format is described in Table 4.  
Table 4 Multiframe Format  
Bit  
#
1
2
3
4
1-8  
.. 761-768  
769-776  
777-784  
785 786  
787 788  
789  
TS1[1:8]  
TS1[1:8]  
TS1[1:8]  
TS1[1:8]  
.. TS96[1:8]  
.. TS96[1:8]  
.. TS96[1:8]  
.. TS96[1:8]  
TS97[1:8]  
TS97[1:8]  
TS97[1:8]  
TS97[1:8]  
TS98[1:8]  
TS98[1:8]  
TS98[1:8]  
TS98[1:8]  
1
1
0
0
m
0
m
e5  
1
0
1
0
x1  
e1  
x2  
e2  
x3  
e3  
a
e4  
Notes  
1. TS1 . TS96 are the byte interleaved payloads.  
8. TS97, TS98 are reserved channels for signaling.  
9. The Frame Alignment Signal is represented as binary ones and zeroes.  
10. m is a 4-kHz datalink.  
11. x1, x2, and x3 are spare bits, usually logic one.  
12. a is the remote LOF alarm bit, active high.  
13. e1.e5 represent the CRC-5 check sequence. The entire 3156-bit multiframe, including the CRC-5  
5
4
2
check sequence, should have a remainder of 0 when divided by x + x + x + 1.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use  
Document ID: PMC-1990267, Issue 3  
58  
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