S/UNI®-JET Data Sheet
Released
While the T3-FRMR is synchronized to the DS3 M-frame, the F-bit and M-bit positions in the
DS3 stream are examined. An OOF defect is detected when three F-bit errors out of eight or 16
consecutive F-bits are observed (as selected by the M3O8 bit in the DS3 FRMR Configuration
Register), or when one or more M-bit errors are detected in three out of four consecutive M-
frames. The M-bit error criteria for OOF can be disabled by the MBDIS bit in the DS3 Framer
Configuration Register. The three out of eight consecutive F-bits OOF ratio provides more robust
operation, in the presence of a high bit error rate, than the three out of 16 consecutive F-bits ratio.
Either OOF criteria allows an OOF defect to be detected quickly when the M-subframe alignment
patterns or, optionally, when the M-frame alignment pattern is lost.
Also while in-frame, LCV, M-bit or F-bit framing bit errors, and P-bit parity errors are indicated.
When C-bit parity mode is enabled, both C-bit parity errors and FEBEs are indicated. These error
indications, as well as the LCV and excessive zeros indication, are accumulated over one second
intervals with the Performance Monitor (PMON). Note: The framer is an off-line framer,
indicating both OOF and COFA events. Even if an OOF is indicated, the framer will continue
indicating performance monitoring information based on the previous frame alignment.
Three DS3 maintenance signals (a RED alarm condition, the AIS, and the idle signal) are detected
by the T3-FRMR. The maintenance detection algorithm uses a simple integrator with a 1:1 slope
that is based on the occurrence of "valid" M-frame intervals. For the RED alarm, an M-frame is
said to be a "valid" interval if it contains a RED defect, defined as an occurrence of an OOF or
LOS event during that M-frame. For AIS and IDLE, an M-frame interval is "valid" if it contains
AIS or IDLE, defined as the occurrence of less than 15 discrepancies in the expected signal
pattern (1010.. for AIS, 1100.. for IDLE) while valid frame alignment is maintained. This
-3
discrepancy threshold ensures the detection algorithms operate in the presence of a 10 bit error
rate. For AIS, the expected pattern may be selected to be: the framed "1010" signal; the framed
arbitrary DS3 signal and the C-bits all zero; the framed "1010" signal and the C-bits all zero; the
framed all-ones signal (with overhead bits ignored); or the unframed all-ones signal (with
overhead bits equal to ones).
Each "valid" M-frame causes an associated integration counter to increment; "invalid" M-frames
cause a decrement. With the "slow" detection option, RED, AIS, or IDLE are declared when the
respective counter saturates at 127, which results in a detection time of 13.5 ms. With the "fast"
detection option, RED, AIS, or IDLE are declared when the respective counter saturates at 21,
which results in a detection time of 2.23 ms, that is, 1.5 times the maximum average reframe
time. RED, AIS, or IDLE are removed when the respective counter decrements to zero. DS3 LOF
detection is provided as recommended by ITU-T G.783 with programmable integration periods of
1 ms, 2 ms, or 3 ms. While integrating up to assert LOF, the counter will integrate up when the
framer asserts an OOF condition and integrates down when the framer de-asserts the OOF
condition. Once an LOF is asserted, the framer must not assert OOF for the entire integration
period before LOF is de-asserted.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
55
PMC [ PMC-SIERRA, INC ]
