PM7346 S/UNI-QJET
DATASHEET
PMC-960835
ISSUE 6
SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
Pin Name
Type
Input
Pin No. Function
P20
RFCLK
Receive FIFO Read Clock (RFCLK). This
signal is used to read ATM cells from the
receive FIFOs. RFCLK must cycle at a 52
MHz or lower instantaneous rate, but at a
high enough rate to avoid FIFO overflows.
Please note that the RFCLK input is not 5
V tolerant, it is a 3.3 V only input pin.
DRCA[4]
DRCA[3]
DRCA[2]
DRCA[1]
Output L17
M20
Direct Access Receive Cell Available
(DRCA[4:1]). These output signals
indicate when a cell is available in the
receive FIFO for the corresponding port.
DRCA[4:1] can be configured to be de-
asserted when either zero or four bytes
remain in the FIFO. DRCA[4:1] will thus
transition low on the rising edge of RFCLK
after Payload byte 48 (RCALEVEL0=1) or
43 (RCALEVEL0=0) is output for the 8-bit
interface (ATM8=1), or after Payload word
24 (RCALEVEL0=1) or 19
M19
M18
(RCALEVEL0=0) is output for the 16-bit
interface (ATM8=0).
The DRCA[4:1] outputs can be used to
support Utopia Direct Access mode.
PHY_ADR[2] Input
PHY_ADR[1]
K18
L20
L19
Device Identification Address
(PHY_ADR[2:0]). The PHY_ADR[2:0]
inputs are the most-significant bits of the
address space which this S/UNI-QJET
occupies. When the PHY_ADR[2:0] inputs
match the TADR[4:2] or RADR[4:2] inputs,
then one of the four quadrants (as
PHY_ADR[0]
determined by the TADR[1:0] or RADR[1:0]
inputs) in this S/UNI-QJET is selected for
transmit or receive ATM access.
Note that the null-PHY address 1FH is an
invalid address and will not be identified to
any port on the S/UNI-QJET.
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 49
PMC [ PMC-SIERRA, INC ]
