PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Pin Name
TXPRTY
Type
Pin Function
No.
Input
37
Transmit bus parity (TXPRTY). This signal
indicates the parity of the TDAT[7:0] bus. Odd or
even parity selection can be made using a
register. TXPRTY is sampled on the rising edge
of TFCLK and is considered valid only when
TWRENB[n]/TWRMPHB is simultaneously
asserted.
A parity error is indicated by a status bit and a
maskable interrupt. Cells with parity errors are
inserted in the transmit stream, so the TXPRTY
input may be unused.
TWRMPHB Input
65
Transmit Multi-Phy Write Enable (TWRMPHB).
The TWRMPHB signal is available on this pin
when input MPHEN is high. This active low
input is used to initiate writes to the transmit
FIFOs. When sampled low using the rising
edge of TFCLK, the byte on TDAT[7:0] is written
into the transmit FIFO selected by the TWA[1:0]
address bus. When sampled high using the
rising edge of TFCLK, no write is performed. A
complete 53 octet cell must be written to the
transmit FIFO before it is inserted into the
transmit stream. Idle/unassigned cells are
inserted when a complete cell is not available.
TWRENB[1
]
Transmit Write Enable PHY #1 (TWRENB[1]).
The TWRENB[1] signal is available on this pin
when input MPHEN is low. TWRENB[1] is used
to initiate writes to the transmit FIFO of PHY #1.
When sampled low using the rising edge of
TFCLK (and the remaining three TWRENBs
remain high), a byte is written to PHY #1's
synchronous FIFO. When sampled high using
the rising edge of TFCLK, no write is performed.
TWRENB[1] must operate in conjunction with
TFCLK to access the FIFOs at a high enough
instantaneous rate as to avoid FIFO overflows.
The ATM layer device may deassert
TWRENB[1] at anytime it is unable to provide
another byte.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
31
PMC [ PMC-SIERRA, INC ]
