PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Pin Name
Type
Pin Function
No.
TDLCLK[4] Output
TDLCLK[3]
31
30
29
28
Transmit Data Link Clock (TDLCLK). The
TDLCLK signal is available on this pin when the
internal HDLC transmitter (XFDL) is disabled
from use. The rising edge of TDLCLK is used to
sample the data stream contained on the
TDLSIG input. When the S/UNI-MPH is
configured to transmit T1-SF formatted data, or
when the T1/E1 framers are bypassed, TDLCLK
is held low.
TDLCLK[2]
TDLCLK[1]/
TDLUDR[4]
TDLUDR[3]
TDLUDR[2]
TDLUDR[1]
Transmit Data Link Underrun (TDLUDR). The
TDLUDR signal is available on this pin when
XFDL is enabled. TDLUDR goes high when the
processor has failed to service the TDLINT
interrupt before the transmit buffer is emptied.
TCLKO[4]
TCLKO[3]
TCLKO[2]
TCLKO[1]
Output
Output
48
45
25
22
Transmit Clock Output (TCLKO). The TDP,
TDN, and TDD outputs may be enabled to be
updated on the rising or falling edge of TCLKO.
TCLKO is the transmit clock that is adequately
jitter and wander free in absolute terms to permit
an acceptable transmission signal to be
generated. Depending on the configuration of
the S/UNI-MPH, TCLKO may be derived from
TCLKI, RCLKO, or XCLK, with or without jitter
attenuation.
Transmit Digital Positive Line Pulse (TDP). This
signal is available on the pin when the S/UNI-
MPH is configured to transmit dual-rail data.
The TDP signal can be formatted for either RZ
or NRZ waveforms, and can be enabled to be
updated on the rising or falling edge of TCLKO.
TDP[4]
TDP[3]
TDP[2]
TDP[1]/
46
43
26
23
TDD[4]
TDD[3]
TDD[2]
TDD[1]
Transmit Digital Data (TDD). This signal is
available on the pin when the S/UNI-MPH is
configured to transmit single-rail data, or when
the T1/E1 framers are bypassed. The TDD
signal may be enabled to be updated on the
rising or falling edge of TCLKO.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
22
PMC [ PMC-SIERRA, INC ]
