PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Registers 070H, 170H, 270H and 370H: RXCP Control
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R
HCSPASS
HCSDQDB
HCSADD
HCK
BLOCK
DSCR
0
0
0
0
0
0
X
0
OOCDV
FIFORST
R/W
FIFORST:
The FIFORST bit is used to reset the receive FIFO. When a logic 1 is written
to FIFORST, the FIFO is immediately emptied, and incoming assigned cells
are ignored. When a logic 0 is written to FIFORST, the receive FIFO
operates normally.
OOCDV:
The OOCDV bit indicates the current out of cell delineation defect state.
When an HCS error is detected in seven consecutive cells, OOCDV is set to
logic 1. When six consecutive cells containing no HCS errors are detected,
OOCDV is set to logic 0.
DSCR:
The DSCR bit controls cell payload descrambling using the self-synchronizing
polynomial x43 + 1. When a logic 1 is written to DSCR, payload descrambling
is enabled. When a logic 0 is written to DSCR, payload descrambling is
disabled.
BLOCK:
The BLOCK bit enables idle/unassigned and user-programmable cell
filtering. When a logic 1 is written to BLOCK, idle/unassigned cells or user-
programmed cells corresponding to the pattern specified in the
Idle/Unassigned Cell Pattern and User-programmable Cell Pattern Registers,
and their associated Cell Mask Registers, are blocked. When a logic 0 is
written to BLOCK, only idle/unassigned cells or user-programmed cells
corresponding to the pattern specified in the Idle/Unassigned Cell Pattern and
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
182
PMC [ PMC-SIERRA, INC ]
