PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Registers 01CH, 11CH, 21CH and 31CH: T1-FRMR Configuration
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
M2O[1]
M2O[0]
ESFFA
ESF
FMS1
FMS0
0
0
0
0
0
0
X
X
Unused
Unused
These registers select the framing format and the frame loss criteria used by the
T1-FRMR.
M2O[1:0]:
The M2O[1:0] bits select the ratio of errored to total framing bits before
declaring out of frame in SF and ESF framing formats.
M2O[1:0]
Framing bit error ratio to declare OOF
00
01
10
11
2 out of 4
2 out of 5
2 out of 6
Reserved
ESFFA:
The ESFFA bit selects one of two framing algorithms for ESF frame search in
the presence of mimic framing patterns in the incoming data. A logic 0 selects
the ESF algorithm where the T1-FRMR does not declare inframe while more
than one framing bit candidate is following the framing pattern in the incoming
data. A logic 1 selects the ESF algorithm where a CRC-6 calculation is
performed on each framing bit candidate, and is compared against the CRC
bits associated with the framing bit candidate to determine the most likely
framing bit position.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
110