PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Registers 011H, 111H, 211H and 311H: CDRC Interrupt Enable
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
LCVE
LOSE
LCSDE
EXZE
Unused
Unused
Unused
Unused
0
0
0
0
X
X
X
X
The bit positions LCVE, LOSE, LCSDE and EXZE of this register are interrupt
enables to select which of the status events (Line Code Violation , Loss Of
Signal, B8ZS/HDB3 Signature Detection, or Excessive Zeros Detection), either
singly or in combination, are enabled to generate an interrupt on the INTB pin
when they are detected. A logic 1 bit in the corresponding bit position enables the
detection of these signals to generate an interrupt; a logic 0 bit in the
corresponding bit position disables that signal from generating an interrupt.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
97
PMC [ PMC-SIERRA, INC ]
