PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Address
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
734H
740H
773H
788H
789H
78AH
TDLSIG[4]
2
TCLKI
TFPI
3
RRDENB[4]
TFCLK
RFCLK
TXPRTY
TSOC
MPHEN
TDAT[2]
TDAT[7] TDAT[6] TDAT[5] TDAT[4] TDAT[3]
TDAT[1]
TDAT[0]
TWRENB[4]
Notes:
1. The MODE[1] in the Transmit Configuration Register and the FIFOBYP
register bit must not be set.
2. So long as the PAYLB register bit is not set.
3. Only one of RRDENB[4:1] can be set low at any time for the proper value to
be read.
Writing the following address locations forces the outputs to the state of the
corresponding D[7:0] bits.
Table 3
- Controlling Outputs in Test Mode 0
Address D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
1
2
410H
INT
RCLKO
TDP[1]
1
3
418H
434H
438H
440H
444H
488H
INT
TCLKO[1]
TDN[1]
4
TDLCLK[1]
TDLSIG[1]
RDLCLK[1] RDLSIG[1]
5
TDLCLK[1]
6
TDLCLK[1]
TCA[1],
7
TCAMPH
1
INT
510H
518H
534H
538H
540H
544H
1
3
INT
TCLKO[2]
TDN[2]
TDP[2]
4
TDLCLK[2]
TDLSIG[2]
RDLCLK[2] RDLSIG[2]
TDLCLK[2]
5
TDLCLK[2]
6
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
220
PMC [ PMC-SIERRA, INC ]
