PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Register 00BH: Master Test
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
A_TM[9]
A_TM[8]
PMCTST
DBCTRL
IOTST
X
X
X
X
0
0
0
0
R/W
R/W
W
W
R/W
W
HIZDATA
HIZIO
R/W
This register is used to select S/UNI-MPH test features. All bits, except for
PMCTST and A_TM[9:8], are reset to zero by a hardware reset of the S/UNI-
MPH. A software reset of the S/UNI-MPH does not affect the state of the bits in
this register. Refer to the Test Features Description section for more information.
A_TM[9]:
The state of the A_TM[9] bit internally replaces the input address line A[9]
when PMCTST is set. This allows for more efficient use of the PMC
manufacturing test vectors.
A_TM[8]:
The state of the A_TM[8] bit internally replaces the input address line A[8]
when PMCTST is set. This allows for more efficient use of the PMC
manufacturing test vectors.
PMCTST:
The PMCTST bit is used to configure the S/UNI-MPH for PMC's
manufacturing tests. When PMCTST is set to logic 1, the S/UNI-MPH
microprocessor port becomes the test access port used to run the PMC
manufacturing test vectors. The PMCTST bit is logically "ORed" with the
IOTST bit, and can only be cleared by setting CSB to logic 1.
DBCTRL:
The DBCTRL bit is used to pass control of the data bus drivers to the CSB
pin. When the DBCTRL bit is set to logic 1, the CSB pin controls the output
enable for the data bus. While the DBCTRL bit is set, holding the CSB pin
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
217
PMC [ PMC-SIERRA, INC ]
