PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Registers 089H, 189H, 289H and 389H: TXCP Interrupt Enable/Status and
Control
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R
FIXPAT
HCKE
FIFOE
TFULL4
HCKI
COCAI
FOVRI
Unused
0
0
0
0
X
X
X
X
R
R
FOVRI:
The FOVRI bit is set to logic 1 when the transmit FIFO has overrun. The
FOVRI bit position is set to logic 0 when this register is read.
COCAI:
The COCAI bit is set to logic 1 when a change of cell alignment (COCA) is
detected. Start of cell indications are indicated by the TSOC input, and are
expected during the first octet of the 53 octet data structure written to the
transmit FIFO. If the FIFO's internal cell counter indicates that TSOC does
not coincide with the first octet or is not present during the first octet, COCAI
is set to logic 1. The COCAI bit position is set to logic 0 when this register is
read.
HCKI:
The HCKI bit is set to logic 1 when a FIFO data path integrity error is
detected. An external device must insert either an alternating AAH/55H or a
fixed 55H pattern in the HCS octet placeholder location (the AAH/55H pattern
alternates with each cell written to the transmit FIFO). The TXCP verifies that
either the alternating or the fixed pattern is present in the data structure read
from the transmit FIFO. Any pattern discrepancy indicates a failure in the
transmit data path, and causes HCKI to be set to a logic 1. The HCKI bit
position is set to logic 0 when this register is read.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
208
PMC [ PMC-SIERRA, INC ]
