PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Registers 084H, 184H, 284H and 384H: RXCP LCD Count Threshold
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LCDC[7]
LCDC[6]
LCDC[5]
LCDC[4]
LCDC[3]
LCDC[2]
LCDC[1]
LCDC[0]
1
0
1
1
0
1
0
0
LCDC [7:0]:
The LCDC[7:0] bits represent half the number of consecutive cell periods for
which the receive cell processor must be out of cell delineation before loss of
cell delineation (LCD) is declared. Similarly, LCD is not deasserted until the
receive cell processor is in cell delineation for a number of cell periods equal
to twice the contents of LCDC[7:0].
The LCDC[7:0] bits determine the LCD integration time. The default value of
180 sets the cell threshold to 360. This translates to the following LCD
integration periods:
Format
Average cell
period
Default LCD integration
period
DS1 Direct Mapping 276 µs
E1 Direct Mapping 213.7 µs
99.4 ms
76.9 ms
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
205
PMC [ PMC-SIERRA, INC ]
