PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Registers 06DH, 16DH, 26DH and 36DH: RXCP Receive Cell Count MSB
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
R
R
R
R
R
R
R
RCELL[15]
RCELL[14]
RCELL[13]
RCELL[12]
RCELL[11]
RCELL[10]
RCELL[9]
RCELL[8]
X
X
X
X
X
X
X
X
RCELL[15:0]:
RCELL[15:0] represents the aggregate number of cells that have been written
to the receive FIFO since the last time the idle/unassigned cell counter was
polled. Note that this counter represents the number error-free (or error-
corrected), assigned cells that have been received when idle/unassigned cell
filtering and HCS error filtering are enabled. The counter (and all other
counters in the S/UNI-MPH) is polled by writing to the Global Monitoring
register (00CH). Such a write transfers the internally accumulated count to
the UICELL Cell Count Registers and simultaneously resets the internal
counter to begin a new cycle of error accumulation. The transfer in progress
(TIP) bit in register 00CH is polled to determine when the transfer is
complete. The CPPM counters in each quadrant can also be polled by
writing to any address from X60H to X6FH (where X is a value from 0 to 3).
Cells are not passed through the RXCP when an out of cell delineation defect
state is declared.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
179
PMC [ PMC-SIERRA, INC ]
