PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Registers 069H, 169H, 269H and 369H: RXCP Correctable HCS Error Event
Count MSB
Bit
Bit 7
Type
Function
Unused
Unused
Unused
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
R
R
R
R
CHCSE[11]
CHCSE[10]
CHCSE[9]
CHCSE[8]
CHCSE[11:0]:
CHCSE[11:0] represents the number of correctable header check sequence
(CHCS) errors that have been detected since the last time the CHCSE error
counter was polled. The counter (and all other counters in the S/UNI-MPH) is
polled by writing to the Global Monitoring register (00CH). Such a write
transfers the internally accumulated count to the CHCSE Error Count
Registers and simultaneously resets the internal counter to begin a new cycle
of error accumulation. The transfer in progress (TIP) bit in register 00CH is
polled to determine when the transfer is complete. The CPPM counters in
each quadrant can also be polled by writing to any address from X60H to
X6FH (where X is a value from 0 to 3). CHCS errors are not accumulated
when the RXCP has declared an out of cell delineation defect state.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
175
PMC [ PMC-SIERRA, INC ]
