PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
10
FUNCTIONAL DESCRIPTION
This section describes the function of each entity in the S/UNI-IMA-8 block
diagram. Throughout this document the use of the term “transmit” implies data
read in from the cell interface and sent out the lineside interface. Conversely,
“receive” is used to describe the data path from the lineside interface to the cell
interface.
The term “virtual PHY” refers to a single flow on the Any-PHY/UTOPIA bus. Each
IMA group or a single TC connection is mapped to a virtual PHY. For simplicity,
both an IMA group and a TC connection will be referenced as a group. Each IMA
group can map data to/from multiple links. Each TC group is mapped to a single
link.
When supporting fractional T1/E1 via the Clock/Data interface, the timeslots that
are chosen to be part of the fractional connection are also referred to as a link.
10.1 Any-PHY/UTOPIA Interface
The ATM cell interface is an Any-PHY compliant 8/16 bit slave interface which is
compatible with the following options:
• Any-PHY Slave
• UTOPIA Level 2, 8-port slave (multi-PHY-mode)
• UTOPIA Level 2, single port slave (single address mode) for receive side only.
10.1.1 Transmit Any-PHY/UTOPIA Slave (TXAPS)
In the transmit direction, each S/UNI-IMA-8 receives cells on the Any-
PHY/UTOPIA L2 compatible interface operating at clock rates up to 52 MHz and
supporting 16-bit and 8-bit wide data structures. The S/UNI-IMA-8 operates as a
bus slave.
In the 8- and 16-bit UTOPIA Level 2 Multi-address Slave mode, the transmit
interface of the S/UNI-IMA-8 appears as an 8 port multi-PHY. An 11-bit
configuration register TCAEN (only 4 bits are used in UL2 mode) controls the
response to polling the individual channels within this group of 31 ports. Setting
high on TCAEN[0] enables addresses 0 through 7 and TCAEN[3] enables
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
41
PMC [ PMC-SIERRA, INC ]
