RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
Pin Name
Type
Pin No.
Function
TATM_D[15]/RPHY_D[15]
TATM_D[14]/RPHY_D[14]
TATM_D[13]/RPHY_D[13]
TATM_D[12]/RPHY_D[12]
TATM_D[11]/RPHY_D[11]
TATM_D[10]/RPHY_D[10]
TATM_D[9]/RPHY_D[9]
TATM_D[8]/RPHY_D[8]
TATM_D[7]/RPHY_D[7]
TATM_D[6]/RPHY_D[6]
TATM_D[5]/RPHY_D[5]
TATM_D[4]/RPHY_D[4]
TATM_D[3]/RPHY_D[3]
TATM_D[2]/RPHY_D[2]
TATM_D[1]/RPHY_D[1]
TATM_D[0]/RPHY_D[0]
Output C2
ATM: Transmit UTOPIAATM Layer
Data Bits 7 to 0 form the byte-wide
data driven to the PHY layer. Bit 0 is
the Least Significant Bit (LSB). Bit 7
is the Most Significant Bit (MSB)
and is the first bit received for the
cell from the serial line.
B1
D2
E3
D1
E2
F3
F2
H4
J3
J2
J1
L3
K2
K1
K4
Note that only the lower 8 bit of the
bus are used in ATM master mode.
PHY: Receive UTOPIA/Any-PHY
PHY Layer Data Bits 15 to 0 form
the word-wide data driven to the
ATM layer. This bus is only driven
when the ATM layer has selected
the UI_SRC_INTF for a cell transfer.
The upper byte is only used if
16_BIT_MODE is set in the
UI_SRC_CFG register. Otherwise
the upper byte is driven to 0’s. Bit 0
is the LSB. Bit 7 is the MSB of the
first byte and is the first bit received
for the cell from the serial line.
TATM_PAR/ RPHY_PAR
Output D3
ATM: Transmit UTOPIAATM Layer
Parity is a byte parity bit covering
TATM_D(7:0).
PHY: Receive UTOPIA/Any-PHY
PHY Layer Parity is either a byte
parity covering RPHY_D(7:0) or
word parity covering RPHY_D(15:0)
depending on the value of
16_BIT_MODE.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
36
PMC [ PMC-SIERRA, INC ]
