RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
Register 0x80100: RAM Configuration Register (RAM_CFG_REG)
Bit
Type
Function
Default
15:2
1
R/W
R/W
R/W
Unused
X
0
0
RAM_EVEN_PAR
SSRAM_ZBT_MODE
0
This register controls the configuration of RAM.
SSRAM_ZBT_MODE
When set to 0, the pipelined single-cycle deselect SSRAM protocol is used
on the RAM interfaces allowing glueless connection to pipelined single-cycle
deselect SSRAMs. When set to a 1, the pipelined ZBT SSRAM protocol is
used allowing glueless connection to pipelined ZBT SSRAMS.
RAM_EVEN_PAR
The RAM_EVEN_PAR bit selects even or odd parity for the RAM I/F. When
set to a 1, even parity is generated and checked. When set to a 0, odd parity
is used.
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