RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
LIST OF TABLES
TABLE 1 - LINE INTERFACE SIGNAL TABLE SELECTION......................... 50
TABLE 3 - LINE INTERFACE SUMMARY..................................................... 56
TABLE 5 CFG_ADDR AND PHY_ADDR BIT USAGE IN SRC DIRECTION... 69
TABLE 7 CFG_ADDR AND PHY_ADDR BIT USAGE IN SNK DIRECTION... 72
TABLE 9 MINIMUM PARTIAL CELL SIZE PERMITTED IF ALL CONNECTIONS
ARE ACTIVE................................................................................................... 100
TABLE 10 CHANNEL STATUS ..................................................................... 142
TABLE 12 BUFFER DEPTH ......................................................................... 143
TABLE 14 FREQUENCY SELECT – T1 MODE............................................ 149
TABLE 16 FREQUENCY SELECT – E1 MODE ........................................... 151
TABLE 18 LINE_MODE ENCODING............................................................ 163
TABLE 19 AAL1GATOR-8 MEMORY MAP................................................... 172
TABLE 20 A1SP AND LINE CONFIGURATION STRUCTURES SUMMARY173
TABLE 21 TRANSMIT STRUCTURES SUMMARY...................................... 179
TABLE 22 R_CRC_SYNDROME MASK BIT TABLE .................................... 207
TABLE 23R_QUEUE_TBL FORMAT .............................................................. 217
TABLE 24 REGISTER MEMORY MAP......................................................... 238
TABLE 25 COMMAND REGISTER MEMORY MAP..................................... 238
TABLE 26 RAM INTERFACE REGISTERS MEMORY MAP ........................ 244
TABLE 27 UTOPIA INTERFACE REGISTERS MEMORY MAP ................... 246
TABLE 20 CFG_ADDR AND PHY_ADDR BIT USAGE IN SRC DIRECTION253
TABLE 29 CFG_ADDR AND PHY_ADDR BIT USAGE IN SNK DIRECTION254
TABLE 22 LINE INTERFACE REGISTER MEMORY MAP SUMMARY........ 255
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
xvii