PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
Figure 10
- DJAT JitterTransfer
0
-10
-20
G.737, G738,
G.739, G.742
Unacceptable
Region
max
DJAT
response
-19.5
Jitter Gain
(dB)
-30
-40
-50
40
1
100
1k
10k
10
8.8
Jitter Frequency, Hz
Jitter Generation
When no jitter is applied to the input port, the jitter attenuator generates 0.042
UIpp (1/24 UIpp) of output jitter.
Frequency Range
In the non-attenuating mode, that is, when the FIFO is within one UI of
overrunning or under running, the tracking range is 1.963 to 2.133 MHz. The
guaranteed linear operating range for the jittered input clock is 2.048 MHz ±
1278 Hz with worst case jitter (42 UIpp) and maximum XCLK frequency offset (±
100 ppm). The nominal range is 2.048 MHz ± 103 Hz with no jitter or XCLK
frequency offset.
9.14 Timing Options (TOPS)
The Timing Options block provides a means of selecting the source of the
internal input clock to the DJAT block, the reference signal for the digital PLL, and
the clock source used to derive the output TCLKO signal.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
58
PMC [ PMC-SIERRA, INC ]
