PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
Pin Name Type
Pin No.
Function
PQFP PLCC
47 49
BRFPO
Output
When configured for backplane
receive composite multiframe output,
BRFPO goes high on the falling
BRCLK edge (or RCLKO edge if
ELST is by-passed) marking the
beginning of bit 1 of frame 1 of every
16 frame signalling multiframe,
indicating the signalling multiframe
alignment of the BRPCM data stream,
and returns low on the falling BRCLK
edge (or RCLKO edge if ELST is by-
passed) marking the end of bit 1 of
frame 1 of every 16 frame CRC
multiframe, indicating the CRC
multiframe alignment of the BRPCM
data stream. This mode allows both
multiframe alignments to be decoded
externally from the single BRFPO
signal. If the signalling and CRC
multiframe alignments are coincident,
BRFPO will pulse high for 1 clock
cycle.
When configured for backplane
receive overhead output, BRFPO is
high for timeslot 0 and timeslot 16 of
each 256-bit frame, indicating the
overhead bit positions of the BRPCM
data stream.
BRFPO is updated on the falling edge
of BRCLK or RCLKO.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
25
PMC [ PMC-SIERRA, INC ]
