PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
Figure 40
-TCLKI InputTiming
R
TCLKI
t
H
TCLKI
TCLKI
t
t
L
TCLKI
TCLKI
TCLKI = 2.048 MHz – Normal Mode
TCLKI
t
TCLKI
t
t
S
H
BTCLK
BTCLK
BTCLK
Valid
BTCLK
TCLKI = 16.238 MHz – FIFO Bypass Mode
Notes onTCLKI InputTiming:
1. These parameters are guaranteed by design - not measured.
Table 23
Symbol
- Digital Receive Interface InputTiming (Figure 41)
Description
Min
Max
Units
Digital Receive Clock Frequency
(nom. 2.048)
2.1
MHz
Digital Receive Clock Duty Cycle
30
20
70
%
tS
RCLKI to NRZ Digital Receive Input
Set-up Time
ns
RCLKI
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
239
PMC [ PMC-SIERRA, INC ]
