PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
At the system level, reliable operation will be obtained if proper signal integrity is maintained
through the signal path and the receiver requirements are respected. Namely, a worst case eye
opening of 0.7UI and 100mV differential amplitude is needed. These conditions should be
achievable with a system architecture consisting of board traces, two sets of backplane
connectors and up to 1m of backplane interconnects. This assumes proper design of 100Ω
differential lines and minimization of discontinuities in the signal path. Due to power constraints,
the output differential amplitude is approximately 350mV.
The LVDS system is comprised of the LVDS Receiver (RXLV), Data Recovery Unit (DRU),
Receive 8B/10B TeleCombus Decoder (R8TD), Transmit 8B/10B TeleCombus Encoder (T8TE),
APS Parallel to Serial converter (APISO), LVDS Transmitter (TXLV) and Transmitter LVDS
Reference (TXLVREF), and Clock Synthesis Unit (CSU) blocks.
12.1.2 LVDS Receiver (RXLV)
The RXLV ABC is a 777.6 Mb/s Low Voltage Differential Signaling (LVDS) Receiver according to
the IEEE 1596.3-1996 LVDS Specification.
The RXLV ABC is the receiver accepts up to 777.6 Mb/s LVDS signals from the transmitter,
amplifies them, converts them to digital signals and passes them to a data recovery unit (DRU).
As per to the IEEE 1596.3-1996 specification, the RXLV has a differential input sensitivity better
than 100mV, and includes at least 25mV of hysteresis.
12.1.3 Data Recovery Unit (DRU)
The DRU is a fully integrated data recovery and serial to parallel converter which is used for
777.6 Mb/s NRZ data. An 8B/10B block code is used to guarantee transition density for optimal
performance. The DRU recovers data and outputs a 10-bit word synchronized with a line rate
divided by 10 gated clock to allow frequency deviations between the data source and the local
oscillator. The DRU accumulates 10 data bits and outputs them on the next clock edge.
The DRU provides moderate high frequency jitter tolerance suitable for inter-chip serial link
applications. It can support frequency deviations up to ±100ppm.
12.1.4 Receive 8B/10B TeleCombus Decoder (R8TD)
The R8TD works in conjunction with the upstream DRU that packs consecutive bits from an
incoming 8B/10B serial link into a 10-bit wide stream with arbitrary alignment to the 8B/10B
character boundaries.
The R8TD character alignment block uses the K28.5 control character (Comma control / transport
frame alignment) to determine 8B/10B character alignment in the incoming stream. When the
R8TD character alignment state machine is in the out-of-character-alignment state, it searches for
the K28.5 character in all positions of the incoming stream. Upon detecting the K28.5 character,
the R8TD will align its internal character boundary, the character alignment state machine will
transition to the in-character-alignment state and cease searching for subsequent K28.5
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
431
PMC [ PMC-SIERRA, INC ]
