PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Register 0860H: T8TE APS1 Control and Status
Register 0868H: T8TE APS2 Control and Status
Register 0870H: T8TE APS3 Control and Status
Register 0878H: T8TE APS4 Control and Status
Bit
Type
Function
Default
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Reserved
FIFOERRE
TPINS
X
X
X
X
X
X
X
X
X
X
0
Bit 8
Bit 7
Bit 6
Bit 5
R/W
R/W
R/W
R/W
W
Bit 4
0
Bit 3
0
Bit 2
LLBEN
0
Bit 1
CENTER
DLCV
1
Bit 0
R/W
0
DLCV:
The diagnose line code violation bit (DLCV) controls the insertion of line code violation in the
outgoing data stream. When this bit is set high, the transmit encoded data bus is inverted to
generate the complementary running disparity.
CENTER:
The FIFO centering control bit (CENTER) controls the separation of the FIFO read and write
pointers. CENTER is a write only bit. When a logic high is written to CENTER, and the
current FIFO depth is not in the range of 3, 4 or 5 characters, the FIFO depth is forced to be
four 8B/10B characters deep, with a momentary data corruption. Writing to the CENTER bit
when the FIFO depth is in the 3, 4 or 5 character range produces no effect. CENTER always
returns a logic low when read.
LLBEN:
The line loopback enable bit (LLBEN) controls line loopback operation. When LLBEN is set
high, serial line loopback is enabled. When LLBEN is set low, line loopback is disabled.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
413
PMC [ PMC-SIERRA, INC ]
