PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
1011
1100
Path #(11, 23, 35 or47)
Path #(12, 24, 36 or 48)
Invalid path
1101-1111
IADDR[2:0]:
The address location (IADDR[2:0]) bits select which address location is accessed by the
current indirect transfer.
Indirect Address
IADDR[2:0]
Indirect Data
000
001
010
011
100
101
Pointer Interpreter Configuration
Error Monitor Configuration
Pointer Value and ERDI
Captured and Accepted PSL
Expected PSL and PDI
GPO and status
101
to
Unused
111
RWB:
The active high read and active low write (RWB) bit selects if the current access to a internal
register is an indirect read or an indirect write. Writing to the Indirect Address Register
initiates an access to a register. When RWB is set to logic 1, an indirect read access to a
register is initiated. The data from the addressed location as indicated using the IADDR field
will be transferred to the Indirect Data Register. When RWB is set to logic 0, an indirect write
access to a register is initiated. The data from the Indirect Data Register will be transferred to
the addressed register.
BUSY:
The active high busy (BUSY) bit reports if a previously initiated indirect access to an internal
register has been completed. BUSY is set to logic 1 upon writing to the Indirect Address
Register. BUSY is set to logic 0, upon completion of the access. This register should be
polled to determine when new data is available in the Indirect Data Register.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
201
PMC [ PMC-SIERRA, INC ]
