PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
CONTENTS
FEATURES ............................................................................................................................................1
1
1.1
GENERAL..........................................................................................................................................1
SONET SECTION AND LINE / SDH REGENERATOR AND MULTIPLEXER SECTION...................................2
SONET PATH / SDH HIGH ORDER PATH ...........................................................................................3
THE RECEIVE ATM PROCESSOR........................................................................................................3
THE RECEIVE POS PROCESSOR........................................................................................................4
THE TRANSMIT ATM PROCESSOR......................................................................................................4
THE TRANSMIT POS PROCESSOR......................................................................................................4
1.2
1.3
1.4
1.5
1.6
1.7
2
3
4
5
6
7
8
9
APPLICATIONS.....................................................................................................................................6
REFERENCES.......................................................................................................................................7
DEFINITIONS.........................................................................................................................................9
APPLICATION EXAMPLES ................................................................................................................10
BLOCK DIAGRAM ..............................................................................................................................13
DESCRIPTION.....................................................................................................................................17
PIN DIAGRAMS...................................................................................................................................19
SDPIN DESCRIPTION.........................................................................................................................20
9.1
SERIAL LINE SIDE INTERFACE SIGNALS (7) .......................................................................................20
CLOCKS AND ALARMS (7).................................................................................................................21
RECEIVE SECTION/LINE/PATH OVERHEAD EXTRACTION SIGNALS (6) .................................................23
TRANSMIT SECTION/LINE/PATH OVERHEAD INSERTION SIGNALS (7)...................................................24
SYSTEM SIDE UTOPIA AND POS SIGNALS (84) .................................................................................28
APS SERIAL DATA INTERFACE (20) ..................................................................................................37
MICROPROCESSOR INTERFACE SIGNALS (37)...................................................................................39
JTAG TEST ACCESS PORT (TAP) SIGNALS (5).................................................................................40
ANALOG MISCELLANEOUS SIGNALS (10)...........................................................................................41
9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
9.10 ANALOG POWER AND GROUND (107) ...............................................................................................42
9.11 DIGITAL POWER AND GROUND..........................................................................................................44
10
FUNCTIONAL DESCRIPTION.........................................................................................................50
10.1 RECEIVE LINE INTERFACE ................................................................................................................50
10.2 SONET/SDH RECEIVE LINE INTERFACE (SRLI)...............................................................................51
10.3 RECEIVE REGENERATOR AND MULTIPLEXOR PROCESSOR (RRMP) ...................................................51
10.4 RECEIVE TAIL TRACE PROCESSOR (RTTP) ......................................................................................53
10.5 RECEIVE HIGH ORDER PATH PROCESSOR (RHPP)...........................................................................54
10.6 SONET/SDH VIRTUAL CONTAINER ALIGNER (SVCA) ......................................................................62
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
i
PMC [ PMC-SIERRA, INC ]
