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PM5381 参数 Datasheet PDF下载

PM5381图片预览
型号: PM5381
PDF下载: 下载PDF文件 查看货源
内容描述: SATURN用户网络接口,用于2488 Mbit / s的 [SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S]
分类和应用: 网络接口
文件页数/大小: 487 页 / 2424 K
品牌: PMC [ PMC-SIERRA, INC ]
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PMC-Sierra, Inc.  
PRELIMINARY  
PM5381 S/UNI-2488  
DATASHEET  
PMC-2000489  
ISSUE 1  
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S  
10.21.3 LVDS Transmit Reference (TXREF)  
The TXLVREF provides an on-chip bandgap voltage reference (1.20V ±5%) and a precision  
current to the TXLVs. The reference voltage is used to control the common-mode level of the  
TXLV output, while the reference current is used to control the output amplitude. The precision  
currents are generated by forcing the reference voltage across an external, off-chip 4.75k(±1%)  
resistor. The resulting current is then mirrored through several individual reference current  
outputs, so each TXLV receives its own reference current.  
10.21.4 Clock Synthesis Unit (CSU)  
The CSU is a fully integrated clock synthesis unit. It generates low jitter multi-phase differential  
clocks at 777.6 MHz for the usage by the transmitter.  
10.22 JTAG Test Access Port Interface  
The JTAG Test Access Port block provides JTAG support for boundary scan. The standard JTAG  
EXTEST, SAMPLE, BYPASS, IDCODE and STCTEST instructions are supported. The  
S/UNI-2488 identification code is 053810CD hexadecimal.  
10.23 Microprocessor Interface  
The Microprocessor Interface Block provides the logic required to interface the generic  
microprocessor bus with the normal mode and test mode registers within the S/UNI-2488. The  
normal mode registers are used during normal operation to configure and monitor the  
S/UNI-2488. The test mode registers are used to enhance the testability of the S/UNI-2488. The  
register set is accessed as shown below. The corresponding memory map address is identified  
by the address column of the table. Addresses that are not shown are not used and must be  
treated as Reserved.  
Table 7: Register Memory Map  
Address  
Register Description  
S/UNI-2488 Identity, and Global Performance Monitor Update  
S/UNI-2488 Master Reset, Configuration, and Loopback  
S/UNI-2488 Reserved  
0000  
0001  
0002  
0003  
0004  
0005  
0006  
0007  
0008  
0009  
000A  
000B  
S/UNI-2488 Clock Monitors  
S/UNI-2488 Master Interrupt Status #1  
S/UNI-2488 Master Interrupt Status #2  
S/UNI-2488 Master Interrupt Status #3  
S/UNI-2488 Master Interrupt Status #4  
S/UNI-2488 Master Interrupt Status #5  
S/UNI-2488 Master Interrupt Status #6  
S/UNI-2488 Master Interrupt Status #8  
Unused  
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use  
83  
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