S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Figure 1 Typical STS-3c/STM-1 ATM Switch Port Application
UTOPIA Level 3
Interface
PM5380
ATM Layer Device
S/UNI-8x155
TFCLK
TENB
TxClk
TxEnb
TxAdr[1:0]
TxClav
TADR[1:0]
TCA
RXD[0]+/-
SD[0]
TXD[0]+/-
Optical
Transceiver
#1
TxSOC
TxPrty
TSOC
TPRTY
TDAT[31:0]
TxData[31:0]
RxClk
RxEnb
RxAdr[1:0]
RxClav
RFCLK
RENB
RXD[7]+/-
SD[7]
TXD[7]+/-
Optical
Transceiver
#8
RADR[1:0]
RCA
RxSOC
RSOC
RxPrty
RxData[31:0]
RPRTY
RDAT[31:0]
In a typical Packet over SONET/SDH application (i.e. using the PPP protocol) the S/UNI-8x155
performs clock and data recovery in the receive direction and clock synthesis in the transmit
direction of the line interface. On the system side, the S/UNI-8x155 interfaces directly with a
data link layer processor using a SATURN POS-PHY Level 3 32-bit (clocked up to 104 MHz)
synchronous FIFO interface over which packets are transferred.
An application with a POS-PHY Level 3 interface is shown in Figure 2. The initial
configuration and ongoing control and monitoring of the S/UNI-8x155 are normally provided
via a generic microprocessor interface.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
34
PMC [ PMC-SIERRA, INC ]
