STANDARD PRODUCT
PM5365 TEMAP
DATASHEET
PMC-1991148
ISSUE 3
HIGH DENSITY VT/TU MAPPER
AND M13 MULTIPLEXER
19
MECHANICAL INFORMATION.............................................................232
FIGURES
FIGURE 1 - CHANNELIZED DS3 CIRCUIT EMULATION APPLICATION.......16
FIGURE 2 - HIGH DENSITY FRAME RELAY APPLICATION..........................16
FIGURE 3 - TEMAP BLOCK DIAGRAM ..........................................................18
FIGURE 4 - VT/TU MAPPER BLOCK DIAGRAM ............................................19
FIGURE 5 - DS3 FRAMER ONLY MODE BLOCK DIAGRAM .........................20
FIGURE 6 - PIN DIAGRAM..............................................................................25
FIGURE 7 - CRC MULTIFRAME ALIGNMENT ALGORITHM..........................61
FIGURE 8 - DJAT JITTER TOLERANCE T1 MODES......................................68
FIGURE 9 - DJAT JITTER TOLERANCE E1 MODES .....................................69
FIGURE 10- DJAT MINIMUM JITTER TOLERANCE VS. XCLK ACCURACY T1
MODES
70
FIGURE 11- DJAT MINIMUM JITTER TOLERANCE VS. XCLK ACCURACY E1
MODES 70
FIGURE 12- DJAT JITTER TRANSFER T1 MODES ........................................71
FIGURE 13- DJAT JITTER TRANSFER E1 MODES........................................72
FIGURE 14- CLOCK MASTER: CLEAR CHANNEL .........................................98
FIGURE 15- CLOCK SLAVE: CLEAR CHANNEL.............................................98
FIGURE 16- CLOCK MASTER: CLEAR CHANNEL .........................................99
FIGURE 17: DS3 FRAME STRUCTURE ........................................................148
FIGURE 18- FER COUNT VS. BER (E1 MODE)............................................152
FIGURE 19- CRCE COUNT VS. BER (E1 MODE).........................................153
FIGURE 20- FER COUNT VS. BER (T1 ESF MODE) ....................................153
Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use
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