STANDARD PRODUCT
PM5365 TEMAP
DATASHEET
PMC-1991148
ISSUE 3
HIGH DENSITY VT/TU MAPPER
AND M13 MULTIPLEXER
Register 2000H: Master Test Register
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
Unused
PMCTST
DBCTRL
IOTST
X
X
X
X
X
X
X
X
W
W
R/W
W
HIZDATA
HIZIO
R/W
This register is used to select TEMAP test features. All bits, except for
PMCTST, are reset to zero by a hardware reset of the TEMAP; a software
reset of the TEMAP does not affect the state of the bits in this register.
PMCTST:
The PMCTST bit is used to configure the TEMAP for PMC's manufacturing
tests. When PMCTST is set to logic 1, the TEMAP microprocessor port
becomes the test access port used to run the PMC "canned" manufacturing
test vectors. The PMCTST bit is logically "ORed" with the IOTST bit, and can
only be cleared by setting CSB to logic 1.
DBCTRL:
The DBCTRL bit is used to pass control of the data bus drivers to the CSB
pin while IOTST is a logic 1. When the DBCTRL bit is set to logic 1, the CSB
pin controls the output enable for the data bus. While the DBCTRL bit is set,
holding the CSB pin high causes the TEMAP to drive the data bus and
holding the CSB pin low tri-states the data bus. The DBCTRL bit overrides
the HIZDATA bit. The DBCTRL bit is used to measure the drive capability of
the data bus driver pads. When IOTST and PMCTST are both logic 0, the
DBCTRL bit is ignored.
IOTST:
The IOTST bit is used to allow normal microprocessor access to the test
registers and control the test mode in each TSB block in the TEMAP for
board level testing. When IOTST is a logic 1, all blocks are held in test mode
and the microprocessor may write to a block's test mode 0 registers to
Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use
135
PMC [ PMC-SIERRA, INC ]
