STANDARD PRODUCT
PM5365 TEMAP
DATASHEET
PMC-1991148
ISSUE 3
HIGH DENSITY VT/TU MAPPER
AND M13 MULTIPLEXER
X (1)
M
D
F (1)
F (1)
D
D
C (0)
C (0)
D
D
F (0)
F (0)
D
D
C (0)
C (0)
D
D
F (0)
F (0)
D
D
C (0)
C (0)
D
D
F (1)
F (1)
D
D
D
(1)
M
D
F (1)
D
C (0)
D
F (0)
D
C (0)
D
F (0)
D
C (0)
D
F (1)
D
(0)
Sꢀ valid M-frame alignment bits (M-bits), M-subframe alignment bits (F-bits), and
parity bit of the preceding M-frame (P-bits). The two P-bits are identical, either
both are zeros or ones.
Sꢀ all the C-bits in the M-frame are set to zeros
Sꢀ the X-bits are set to ones
Sꢀ the information bit (84 Data bits with repeating sequence of 1010..)
9.19.2 DS3 Demapper Elastic Store
The elastic store block is provided to compensate for frequency differences
between the DS-3 stream extracted from the STS-1 (STM-0/AU3) SPE and the
incoming CLK52M. The DS3 Demapper extracts I bits from the STS-1
(STM-0/AU3) SPE and writes the bits into a 128 bit (16 byte) elastic store. Eight
bytes are provided for SONET/SDH overhead (3 bytes for TOH, 1 byte for a
positive stuff, 1 byte for POH) and DS3 reserve stuffing bits (2 bytes for R bits,
and 3 overhead bits which is rounded-up to 1 byte). The remaining 8 bytes are
provided for path pointer adjustments.
Data is read out of the Elastic Store using a divide by 8 version of the input
CLK52M clock. If an overflow or underflow condition occurs, an interrupt is
optionally asserted and the Elastic Store read and write address are reset to the
startup values (logically 180 degrees apart).
9.19.3 DS3 Desynchronizer
The Desynchronizer monitors the Elastic Store level to control the de-stuffing
algorithm to avoid overflow and underflow conditions. The Desynchronizer
assumes either a 51.84 MHz clock (provided internally) or a 44.928 MHz clock
(provided via input CLK52M).
When using a 44.928 MHz CLK52M clock, the DS3 clock is generated using a
fixed 8 KHz interval. The 8KHz interval is subdivided into 9 rows. Each row
contains either 621 or 622 clock periods. The DS3RICLK contains 624 pulses at
72KHz (9*8KHZ). To generate 621 pulses, a gap pattern of 207 clocks + 1 clock
Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use
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