PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Pin Name
IDP[2]
Type
Pin
Function
No.
Input
A19
The incoming data parity #2 (IDP[2]) signal
carries the parity of the incoming signals for the
STM-1 #2 stream.
In incoming STM-1 (STS-3) interface mode
(IHSMODEB set high), the parity calculation
encompasses the ID[15:8] bus and optionally
the IC1J1[2] and the IPL[2] signals. IC1J1[2] and
IPL[2] can be included in the parity calculation
by setting the corresponding INCIC1J1 and
INCIPL register bits high, respectively. Odd
parity is selected by setting the corresponding
IOP register bit high, and even parity is selected
by setting the IOP bit low. IDP[2] is sampled on
the rising edge of SCLK.
In incoming STM-4 (STS-12) interface mode
(IHSMODEB set low), IDP[2] is unused and
must be strapped low.
IDP[3]
Input
Y19
The incoming data parity #3 (IDP[3]) signal
carries the parity of the incoming signals for the
STM-1 #3 stream.
In incoming STM-1 (STS-3) interface mode
(IHSMODEB set high), the parity calculation
encompasses the ID[23:16] bus and optionally
the IC1J1[3] and the IPL[3] signals. IC1J1[3] and
IPL[3] can be included in the parity calculation
by setting the corresponding INCIC1J1 and
INCIPL register bits high, respectively. Odd
parity is selected by setting the corresponding
IOP register bit high, and even parity is selected
by setting the IOP bit low. IDP[3] is sampled on
the rising edge of SCLK.
In incoming STM-4 (STS-12) interface mode
(IHSMODEB set low), IDP[3] is unused and
must be strapped low.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
40
PMC [ PMC-SIERRA, INC ]
