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PM5363-BI 参数 Datasheet PDF下载

PM5363-BI图片预览
型号: PM5363-BI
PDF下载: 下载PDF文件 查看货源
内容描述: SONET / SDH支路单元荷载处理器, 622兆比特/ s接口 [SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S INTERFACES]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 459 页 / 3435 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM5363 TUPP+622  
TUPP+622  
DATASHEET  
PMC-1981421  
ISSUE 4  
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S  
INTERFACES  
Pin Name  
IDP[1]  
Type  
Pin  
Function  
No.  
Input  
W1  
The incoming data parity #1 (IDP[1]) signal  
carries the parity of the incoming signals for the  
STM-4 or STM-1 #1 stream.  
In incoming STM-1 (STS-3) interface mode  
(IHSMODEB set high), the parity calculation  
encompasses the ID[7:0] bus and optionally the  
IC1J1[1] and the IPL[1] signals. IC1J1[1] and  
IPL[1] can be included in the parity calculation  
by setting the corresponding INCIC1J1 and  
INCIPL register bits high, respectively. Odd  
parity is selected by setting the corresponding  
IOP register bit high, and even parity is selected  
by setting the IOP bit low. IDP[1] is sampled on  
the rising edge of SCLK.  
In incoming STM-4 (STS-12) interface mode  
(IHSMODEB set low), the parity calculation  
encompasses the ID[7:0] bus and optionally the  
IC1J1[1] and the IPL[1] signals. IC1J1[1] and  
IPL[1] can be included in the parity calculation  
by setting the corresponding INCIC1J1 and  
INCIPL register bits high, respectively. Odd  
parity is selected by setting the corresponding  
IOP register bit high, and even parity is selected  
by setting the IOP bit low. IDP[1] is sampled on  
the rising edge of HSCLK.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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