PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Register 422H, 462H, 4A2H: RTTB, TU #3 in TUG2 #1 to TUG2 #7, TIM
Interrupt
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
TIM7I
TIM6I
TIM5I
TIM4I
TIM3I
TIM2I
TIM1I
X
0
0
0
0
0
0
0
R
R
R
R
R
R
R
This register is used to identify and acknowledge trail trace identifier mismatch
interrupts for the tributaries TU #3 in TUG2 #1 to TUG2 #7.
TIM1I-TIM7I:
The TIM1I to TIM7I bits identify the source of trail trace identifier mismatch
interrupts. In TU3 mode, these bits are unused and will return a logic 0 when
read. When the corresponding TUG2 tributary group is configured for TU2
(VT6) or VT3 mode, the associated TIMxI bit is unused and will return a logic
0 when read. When operational, the TIM1I to TIM7I bits report and
acknowledge TIM interrupt of TU #3 in TUG2 #1 to TUG2 #7, respectively.
Interrupts are generated upon change of identifier mismatch state. An TIMxI
bit is set high when a trail trace identifier mismatch event on the
corresponding tributary (TU #3 in TUG2 #x) occurs and are cleared
immediately following a read of this register, which also acknowledges and
clears the interrupt. TIMxI remains valid when interrupts are not enabled
(TIME set low) and may be polled to detect trail trace identifier mismatch
events.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
311
PMC [ PMC-SIERRA, INC ]
