PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Register 1FCH, 2FCH, 3FCH: RTOP, TU #4 in TUG2 #1 to TUG2 #7, RFI
Interrupt
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
RFI7I
RFI6I
RFI5I
RFI4I
RFI3I
RFI2I
RFI1I
X
0
0
0
0
0
0
0
R
R
R
R
R
R
R
This register is used to identify and acknowledge remote failure indication
interrupts for the tributaries TU #4 in TUG2 #1 TO TUG2 #7.
RFI1I-RFI7I:
The RFI1I to RFI7I bits identify the source of remote failure indication
interrupts. In TU3 mode, these bits are unused and will return a logic 0 when
read. When the corresponding TUG2 tributary group is configured for TU2
(VT6), VT3 or TU12 (VT2) mode, the associated RFIxI bit is unused and will
return a logic 0 when read. When operational, the RFI1I to RFI7I bits report
and acknowledge RFI interrupt of TU #4 in TUG2 #1 to TUG2 #7,
respectively. Interrupts are generated when the received RFI state changes.
An RFIxI bit is set high when a change of RFI state on the associated tributary
(TU #4 in TUG2 #x) occurs and are cleared immediately following a read of
this register, which also acknowledges and clears the interrupt. RFIxI remains
valid when interrupts are not enabled (RFIE set low) and may be polled to
detect change of remote failure indication events.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
294
PMC [ PMC-SIERRA, INC ]
