PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Register 17BH, 27BH, 37BH: RTOP, TU #2 in TUG2 #1 to TUG2 #7, RDI
Interrupt
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
RDI7I
RDI6I
RDI5I
RDI4I
RDI3I
RDI2I
RDI1I
X
0
0
0
0
0
0
0
R
R
R
R
R
R
R
This register is used to identify and acknowledge remote defect indication
interrupts for the tributaries TU #2 in TUG2 #1 to TUG2 #7.
RDI1I-RDI7I:
The RDI1I to RDI7I bits identify the source of remote defect indication
interrupts. In TU3 mode, these bits are unused and will return a logic 0 when
read. When the corresponding TUG2 tributary group is configured for TU2
(VT6) mode, the associated RDIxI bit is unused and will return a logic 0 when
read. When operational, the RDI1I to RDI7I bits report and acknowledge RDI
interrupt of TU #2 in TUG2 #1 to TUG2 #7, respectively. Interrupts are
generated when the received RDI state changes. An RDIxI bit is set high
when a change of RDI state on the associated tributary (TU #2 in TUG2 #x)
occurs and are cleared immediately following a read of this register, which
also acknowledges and clears the interrupt. RDIxI remains valid when
interrupts are not enabled (RDIE set low) and may be polled to detect change
of remote defect indication events.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
256
PMC [ PMC-SIERRA, INC ]
