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PM5363-BI 参数 Datasheet PDF下载

PM5363-BI图片预览
型号: PM5363-BI
PDF下载: 下载PDF文件 查看货源
内容描述: SONET / SDH支路单元荷载处理器, 622兆比特/ s接口 [SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S INTERFACES]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 459 页 / 3435 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM5363 TUPP+622  
TUPP+622  
DATASHEET  
PMC-1981421  
ISSUE 4  
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S  
INTERFACES  
Register 12H: STP Tributary Auxiliary Remote Defect Indication Control  
Bit  
Type  
Function  
Default  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
NOLOMARDI  
NOLOPARDI  
NOAISARDI  
UNEQARDI  
PSLMARDI  
PSLUARDI  
TIMARDI  
1
1
1
0
0
0
0
0
TIUARDI  
This register controls the insertion of tributary path auxiliary RDI on the receive  
alarm port (RAD) and optionally on the V5 byte (G1 in TU3 mode) as a result of  
tributary pointer alarms, tributary path signal label alarms, tributary trace identifier  
alarms and tributary multiframe alarms.  
TIUARDI:  
The TIUARDI bit is an active high auxiliary RDI insertion enable. When  
TIUARDI is set high, ARDI is reported on RAD and optionally in the V5 byte  
(G1 byte in TU3 mode) of the outgoing data stream for all tributaries that are  
in trace identifier unstable state. When TIURDI is set low, reporting of auxiliary  
RDI due to TIM is inhibited.  
TIMARDI:  
The TIMARDI bit is an active high auxiliary RDI insertion enable. When  
TIMARDI is set high, ARDI is reported on RAD and optionally in the V5 byte  
(G1 byte in TU3 mode) of the outgoing data stream for all tributaries that are  
in trace identifier mismatch state. When TIUARDI is set low, reporting of  
auxiliary RDI due to TIM is inhibited.  
PSLUARDI:  
The PSLUARDI bit is an active high auxiliary RDI insertion enable. When  
PSLUARDI is set high, ARDI is reported on RAD and optionally in the V5 byte  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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