PM5362TUPP-PLUS
DATA SHEET
PMC-951010
ISSUE 6
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR / PERFORMANCE MONITOR
Pin Name Type
Pin
Function
No.
ALE
Input
33
The address latch enable (ALE) is active high
and latches the address bus A[7:0] when low.
When ALE is high, the internal address latches
are transparent. It allows the TUPP-PLUS to
interface to a multiplexed address/data bus.
ALE has an integral pull up resistor.
INTB
OD
28
The active low interrupt (INTB) signal goes low
when a TUPP-PLUS interrupt source is active.
INTB returns high when the interrupt is
acknowledged via an appropriate register
access. INTB is an open drain output.
Output
TCK
TMS
Input
Input
45
53
The test clock (TCK) signal provides timing for
test operations that can be carried out using the
IEEE P1149.1 test access port. TCK has an
integral pull up resistor.
The test mode select (TMS) signal controls the
test operations that can be carried out using the
IEEE P1149.1 test access port. TMS is sampled
on the rising edge of TCK. TMS has an integral
pull up resistor.
TDI
Input
47
The test data input (TDI) signal carries test data
into the device via the IEEE P1149.1 test access
port. TDI is sampled on the rising edge of TCK.
TDI has an integral pull up resistor.
TDO
Tristate 49
The test data output (TDO) signal carries test
data out of the device via the IEEE P1149.1 test
access port. TDO is updated on the falling edge
of TCK. TDO is a tristate output that is always
tristated except when scanning of data is in
progress.
TRSTB
Input
51
The active low test reset (TRSTB) signal
provides an asynchronous test access port
reset. TRSTB is a Schmitt triggered input with
an integral pull up resistor. TRSTB must be
asserted during the power up sequence.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
36
PMC [ PMC-SIERRA, INC ]
