PM5362TUPP-PLUS
DATA SHEET
PMC-951010
ISSUE 6
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR / PERFORMANCE MONITOR
Register 0AH:Tributary Path Overhead Processor andTributary trace Buffer
Interrupt Enable
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
X
X
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
RTTB3E
RTTB2E
RTTB1E
RTOP3E
RTOP2E
RTOP1E
This register provides interrupt enable of the three tributary path overhead
processors and of the three tributary trace buffers in the TUPP-PLUS.
RTOP1E:
RTOP1E is the interrupt enable bit for tributary path overhead processor #1 in
the TUPP-PLUS. Interrupts enabled at tributary path overhead processor #1
but masked by RTOP1E will still be reported by the RTOP1I bit, although the
interrupt output will not be activated. Interrupts disabled at tributary path
overhead processor #1 will not be reported by the RTOP1I bit.
RTOP2E:
RTOP2E is the interrupt enable bit for tributary path overhead processor #2 in
the TUPP-PLUS. Interrupts enabled at tributary path overhead processor #2
but masked by RTOP2E will still be reported by the RTOP2I bit, although the
interrupt output will not be activated. Interrupts disabled at tributary path
overhead processor #2 will not be reported by the RTOP2I bit.
RTOP3E:
RTOP3E is the interrupt enable bit for tributary path overhead processor #3 in
the TUPP-PLUS. Interrupts enabled at tributary path overhead processor #3
but masked by RTOP3E will still be reported by the RTOP3I bit, although the
interrupt output will not be activated. Interrupts disabled at tributary path
overhead processor #3 will not be reported by the RTOP3I bit.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
90
PMC [ PMC-SIERRA, INC ]
