PM5361TUPP
DATA SHEET
PMC-920526
ISSUE 8
TRIBUTARY UNIT PAYLOAD PROCESSOR
Pin Name Type
Pin Function
No.
RDB/
Input
35
The active low read enable (RDB) signal is low
during TUPP register read accesses while in
Intel bus mode. The TUPP drives the D[7:0] bus
with the contents of the addressed register while
RDB and CSB are low.
E
The active high external access (E) signal is high
during TUPP register access while in Motorola
bus mode.
WRB/
Input
37
The active low write strobe (WRB) signal is low
during a TUPP register write accesses while in
Intel bus mode. The D[7:0] bus contents are
clocked into the addressed register on the rising
WRB edge while CSB is low.
RWB
The read/write select (RWB) signal selects
between TUPP register read and write accesses
while in Motorola bus mode. The TUPP drives
the D[7:0] bus with the contents of the addressed
register while CSB is low and RWB and E are
high. The D[7:0] bus contents are clocked into
the addressed register on the falling E edge
while CSB and RWB are low.
D[0]
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
I/O
15
16
17
18
23
24
25
26
The bidirectional data bus D[7:0] is used during
TUPP register read and write accesses.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
17
PMC [ PMC-SIERRA, INC ]
