PMC-Sierra, Inc.
PM5356
S/UNI-622-MAX
DATASHEET
S/UNI-622-MAX
PMC-1980589
ISSUE 5
SATURN USER NETWORK INTERFACE (622-MAX)
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FEATURES
General
1.1
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Single chip ATM over SONET/SDH Physical Layer Device operating at 622.08 Mbit/s.
Implements the ATM Forum User Network Interface Specification and the ATM physical layer for
Broadband ISDN according to CCITT Recommendation I.432.
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Processes duplex bit-serial 622.08 Mbit/s STS-12c/STM-4-4c data streams with on-chip clock and
data recovery and clock synthesis.
Supports a duplex byte-serial 77.76 Mbyte/s STS-12c/STM-4-4c line side interface for use in
applications where by-passing clock recovery, clock synthesis, and serializer-deserializer functionality
is desired.
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Supports a byte-serial 19.44 Mbyte/s STS-3c/STM-1 line side interface on the transmit and/or receive
interface for use in applications where a 155.52 Mbit/s data rate is desired.
Supports clock recovery by-pass for use in applications where external clock recovery is desired.
Meets Bellcore GR-253-CORE (1995 Issues) for jitter tolerance and intrinsic jitter criteria.
Provides UTOPIA Level 2 16-bit wide System Interface (clocked up to 50 MHz) with parity support for
ATM applications.
Provides UTOPIA Level 3 compatible 8-bit wide System Interface (clocked up to 100 MHz) with parity
support for ATM applications.
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Provides support functions for a two chip solution for 1+1 APS operation.
Provides a standard 5 signal IEEE 1149.1 JTAG test port for boundary scan board test purposes.
Provides a generic 8-bit microprocessor bus interface for configuration, control, and status
monitoring.
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Low power 3.3V CMOS with TTL compatible digital inputs and CMOS/TTL digital outputs. PECL
inputs and outputs are 3.3V and 5V compatible.
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Industrial temperature range (-40°C to +85°C).
304 pin Super BGA package.
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1.2
The SONET Receiver
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Provides a serial interface at 622.08 Mbit/s with clock and data recovery.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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