PMC-Sierra, Inc.
PM5356
S/UNI-622-MAX
DATASHEET
S/UNI-622-MAX
PMC-1980589
ISSUE 5
SATURN USER NETWORK INTERFACE (622-MAX)
Register 0x60: RXCP Configuration 1
Bit
Bit 7
Type
Function
Default
R/W
R/W
DDSCR
HDSCR
Unused
Unused
Unused
HCSADD
Reserved
DISCOR
0
0
X
X
X
1
0
0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
DISCOR:
The DISCOR bit controls the HCS error correction algorithm. When DISCOR is a logic zero,
the error correction algorithm is enabled, and single-bit errors detected in the cell header are
corrected. When DISCOR is a logic one, the error correction algorithm is disabled, and any
error detected in the cell header is treated as an uncorrectable HCS error.
HCSADD:
6
4
2
The HCSADD bit controls the addition of the coset polynomial, x +x +x +1, to the HCS octet
prior to comparison. When HCSADD is a logic one, the polynomial is added, and the
resulting HCS is compared. When HCSADD is a logic zero, the polynomial is not added, and
the unmodified HCS is compared.
HDSCR:
43
HDSCR enables the self-synchronous x + 1 descrambler to continue running through the
bytes which should contain the ATM cell headers. When HSCR is set low, the descrambling
polynomial will function only over the ATM payload bytes. When HDSCR is set high, the
descrambling polynomial will function over all bytes, including the 5 ATM header bytes.
DDSCR:
43
The DDSCR bit controls the descrambling of the cell payload with the polynomial x + 1.
When DDSCR is set high, cell payload descrambling is disabled. When DDSCR is set low,
payload descrambling is enabled.
Reserved:
The reserved bits must be programmed to logic zero for proper operation.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
154
PMC [ PMC-SIERRA, INC ]
